Interpreter

Full aarch64 capabilities, everything bootable

The complete Arm64 machine, one instruction at a time and each exactly as Arm defines it. Open source, and it runs wherever WebAssembly runs.

Every instruction, the way Arm defines it

Not the common subset. The instruction set a modern Arm64 kernel and its userland actually use, down to rounding modes and fault flags.

Integer

The complete A64 integer set

LSE and 128-bit atomics, CRC32, FlagM, LRCPC, and the MOPS copy and set instructions recent glibc uses for memcpy.

Floating point

Arm semantics, bit for bit

Half, single and double precision with all four rounding modes, flush-to-zero, default NaN, NaN propagation order and every FPSR flag.

SIMD

Advanced SIMD, checked on an M3

The full vector and scalar set plus FP16, DotProd, BF16, I8MM and complex arithmetic, verified lane for lane against Apple silicon.

Scalable vectors

SVE, SVE2 and SME

Vector lengths from 128 to 2048 bits, predication, gathers and scatters, and the SME2 matrix engine with its ZA array.

Crypto

The cryptographic extension

AES, SHA-1, SHA-256, SHA-512, SHA-3, SM3, SM4 and 64-bit polynomial multiply.

Security

PAC, BTI and MTE

Pointer authentication with the QARMA5 cipher and all five keys, branch target identification, and MTE2 memory tagging with synchronous and asynchronous faults.

Privilege

EL0 to EL3, with VHE

The hypervisor and secure-monitor levels, stage 2 translation, and a Linux that boots at EL2 and brings up KVM.

32-bit

AArch32 and Thumb

A32 and T32 code runs in AArch32 state, IT blocks included.

Multicore

Up to eight cores

A multi-core GIC, per-core timers, PSCI to start secondaries and TLB broadcast, so Linux brings up every core.

What Linux reports fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 asimdfhm ilrcpc flagm sb sve paca pacg dcpodp flagm2 frint i8mm bf16 bti mte

Everything bootable

Stock images, unmodified. The BSDs and Debian’s cloud image start the way hardware does: U-Boot in the boot ROM, then EFI, then their own loader.

Alpine Linux

To a busybox shell, kernel and initramfs loaded directly.

Debian 13

grub, systemd, and a root login on the serial console.

Arch Linux ARM

systemd to the multi-user target, with sshd running.

FreeBSD 15.1

loader.efi, fsck and the rc scripts, to a root login.

OpenBSD 7.9

The installer’s ramdisk kernel, to its install prompt and a working shell.

Built for QEMU’s virt?

warm64 uses the same memory map, devices and firmware path.

Checked against real silicon

An emulator is only as good as its tests, so warm64’s tests are proven on hardware before they judge the emulator.

Oracle one

Apple M3

The instruction suites are built twice: natively for an M3, where they must pass on the real CPU, and for the Interpreter. The expected results come from Arm silicon, not from us.

Oracle two

QEMU

What the M3 lacks, like SVE, SME, SM3 and SM4, and the GIC’s virtualization, runs bare-metal under qemu-system-aarch64 as an independent reference.

A whole machine, not just a CPU

A virt board with the devices a guest expects, driven through QEMU’s own interface.

Storage

virtio-blk disks from raw images, attached sparsely.

Shared folders

virtio-fs, and virtio-9p for kernels without it.

Network

virtio-net, its frames moved by the host: real sockets in Node, a relay in the browser.

Display and input

virtio-gpu, with a virtio keyboard and tablet.

Snapshots

savevm and loadvm, or snapshot the whole machine from the API.

WEMU

The qemu-system-aarch64 command line, QMP and the monitor, from your shell or Node.

Open source. Licensed for business.

Use the Interpreter freely under the AGPL, or take a commercial license when that doesn’t fit your product.

GNU AGPL v3

Free and open

Read it, run it, change it. If you distribute it or let people use it over a network, share your version’s source under the same license.

View the source
Commercial license

For your product

Ship the Interpreter inside a product or service without the AGPL’s obligation to release your source.

Contact us